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ADA10001
Linear Amplifier MMIC
FEATURES
* * * * High Linearity : +18 dBm IIP3 Low Noise Figure: 2.0 dB Single Supply: +8 VDC Wide Bandwidth: 50 MHz to 1 GHz
Data Sheet - Rev 2.2
APPLICATIONS
* * Driver Amplifier CATV - Distribution / Drop Amplifiers
S3 Package Modified 16 Pin SOIC
PRODUCT DESCRIPTION
The ADA10001 is a monolithic IC intended for use in applications requiring high linearity, such as Cellular Telephone Base Station Driver Amplifiers, CATV Fiber Receiver and Distribution Amplifiers and CATV Drop
Amplifiers. Offered in a modified 16 lead surface mount SOIC package, it is well suited for use in amplifiers where small size, reduced component count, and high reliability are important.
RF Input
15 dB
RF Output / Bias
Figure 1: Block Diagram
08/2001
1-1
ADA10001
1 2 3 4 5 6 7 8
GND GND GND GND GND RFIN GND GND
Figure 2: Pin Out
GND GND RFOUT GND GND GND GND GND
16 15 14 13 12 11 10 9
Table 1: Pin Description
PIN 1 2 3 4 5 6 7 8 N AME GND GND GND GND GND RFIN GND GND D ESC R IPTION Ground Ground Ground Ground Ground RF Input Ground Ground PIN 9 10 11 12 13 14 15 16 N AME GND GND GND GND GND RFOUT GND GND D ESC R IPTION Ground Ground Ground Ground Ground RF Output / Supply Ground Ground
1-2
Data Sheet - Rev 2.2 08/2001
ADA10001
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Maximum and Minimum Ratings
PAR AMETER Supply (pi n 14) RF Power at Input (pi n 6) Storage Temperature Solderi ng Temperature Solderi ng Ti me MIN 0 -65 MAX +12 +10 +150 260 5 U N IT VD C dB m
o
C C
o
se c
Stresses in excess of the absolute ratings may cause permanent damage. Functional operation is not implied under these conditions. Exposure to absolute ratings for extended periods of time may adversely affect reliability. Note: 1. Pin 6 should be AC-coupled. No external DC bias should be applied.
Table 3: Operating Ranges
PAR AMETER RF Input / Output Frequency Supply Voltage: VDD (pi n 14) C ase Temperature MIN 50 +4 -40 TYP +8 MAX 1000 +9 +85
(1)
U N IT MHz VD C
o
C
The device may be operated safely over these conditions; however, parametric performance is guaranteed only over the conditions defined in the electrical specifications. Note: (1) Median time to failure will degrade above this temperature.
Data Sheet - Rev 2.2 08/2001
1-3
ADA10001 Table 4: Electrical Specifications (TA = +25 C, VDD = + 8 VDC, Test System = 75W )
PAR AMETER C SO (1) C TB Gai n Noi se Fi gure 2nd Order Input Intercept Poi nt (IIP2) (2) 3rd Order Input Intercept Poi nt (IIP3) (2) Thermal Resi stance C urrent C onsumpti on (3)
(1)
MIN 60 65 14 +35 +15 50
TYP 15 2.0 +38 +18 -
MAX 3.5 35 150
U N IT dB c dB c dB dB dB m dB m
o
C /W mA
Notes: (1) 160 channels, +23 dBmV per channel (measured at output), 6 MHz channel spacing (2) Two tones, -10 dBm per tone at input (3) The device can be operated at VDD = +6 VDC for lower power dissipation. Refer to the figures on page 5 for performance variation with supply voltage.
1000 pF 5 3.9 H
RF
OUT
1.5 pF VDD
1000 pF RF
IN
5.6 nH 2.7 pF
0.1f
Figure 3: Test Circuit
1-4
Data Sheet - Rev 2.2 08/2001
ADA10001
PERFORMANCE DATA
18 17 Gain (dB) 16 15 14 13 12 50 250 450 650 Frequency (MHz) 850
Figure 4: Gain Noise Figure vs. Frequency TA = 25 oC, VDD = +8V
4 3.5 3 2.5 2 1.5 1 Noise Figure (dB)
GAIN
NF
Figure 5: Gain and Noise Figure vs. VDD TA = 25 o C, RF = 500 MH z
15.8
2.02
GAIN
15.75 Gain (dB) 15.7 15.65 15.6 15.55 4 5
NF
1.98 1.96 1.94 1.92 1.9 1.88 6 7 VDD (Volts)
Figure 6: IIP2, IIP3 vs. VDD
8
9
TA = 25 oC 40 36 IIP2 (dBm ) 32 28 24 20 4 5 6 7 VDD (Volts) 8 9 12 24 IIP3 (dBm )
IIP2
IIP3
20
16
Notes: 1. IIP2 measured at 986.5 MHz; Input = two tones at 55.25 MHz and 931.25 MHz at -10 dBm. 2. IIP3 measured with two tones at the input: 986.5 MHz and 992.5 MHz at -10 dBm. Data Sheet - Rev 2.2 08/2001
Noise Figure (dB)
2
1-5
ADA10001 Figure 7: Output Power vs. Input Power
26 25 24 Output Power (dBm) 23 22 21 20 19 18 17 16 15 0 2 4 6 8 Input Power (dBm) 10 12
TA = 25 oC, VDD = +8V, RF = 500 MHz
Figure 8: Input Impedance
START: 0.050 GHz STOP: 1.00 GHz
1: 0.050 GHz 79.76 - 4.79 j
1 .5 2 5 5 0 -.2 .2 .5
32 54 6
2:
0.20 GHz 77.88 - 13.21 j
.2
1
3:
1
2
5
4:
0.40 GHz 70.02 - 21.83 j 0.6 GHz 59.63 - 26.56 j 0.8 GHz 49.91 - 26.56 j 1.0 GHz 41.77 - 25.15 j
-5
5:
-.5 -1
-2
6:
Measured in 75 System
Figure 9: Output Impedance
START: 0.050 GHz STOP: 1.00 GHz
1 .5 2
3:
1: 0.050 GHz 83.9 - 8.1 j 0.20 GHz 84.17 - 1.19 j
2:
.2 5
1
5
4:
0.40 GHz 85.38 - 2.27 j 0.6 GHz 87.64 - 3.82 j 0.8 GHz 90.20 - 6.60 j 1.0 GHz 93.57 - 11.76 j
0 -.2
.2
.5
1
6
2
5 -5
5:
-.5 -1
-2
6:
Measured in 75 System
1-6
Data Sheet - Rev 2.2 08/2001
ADA10001
PACKAGE OUTLINE
D C
LE
E
H
0.015 [0.38]X45
L
a
A A2 A1
GAUGE PLANE 0.003 [0.076mm] SEATING PLANE
e
B1
B
S
Y M
INCHES
B O L
MILLIMETERS
MIN. MAX.
NOTE
NOTES: 1. CONTROLLING DIMENSION: INCHES 2. DIMENSION "D" DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS AND GATE BURRS SHALL NOT EXCEED 0.006 [0.15mm] PER SIDE. 3. DIMENSION "E" DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. INTER-LEAD FLASH AND PROTRUSIONS SHALL NOT EXCEED 0.010 [0.25mm] PER SIDE.
MIN.
MAX.
A A1 A2
B
0.058 0.004 0.055 0.013 0.062 0.008 0.380 0.150
0.068 0.010 0.065 0.020 0.070 0.010 0.400 0.160
1.47 0.10 1.40 0.33 1.58 0.20 9.66 3.81
1.73 0.25 1.65 0.50 1.78 0.25 10.16 4.06 4 2 3
B1 C D E e H L LE
4. LEAD THICKNESS AFTER PLATING TO BE 0.013 [0.33mm] MAXIMUM.
0.050 BSC 0.226 0.016 0.030 0 8 0.244 0.040
1.27 BSC 5.74 0.41 0.76 0 8 6.20 1.02
SPECIFICATION: SUBJECT:
98000-006
PUBLISHED OUTLINE,
16 LEAD BATWING SOIC PKG.
a
Figure 10: S3 Package Outline - Modified 16 Pin SOIC
Data Sheet - Rev 2.2 08/2001
1-7
ADA10001
ORDERING INFORMATION
OR D ER N U MB ER AD A10001S3C TR A D A 10001S 3C TEMPER ATU R E R AN GE -40 oC to +85 oC -40 oC to +85 oC PAC K AGE D ESC R IPTION Modi fi ed 16 Pi n SOIC Modi fi ed 16 Pi n SOIC C OMPON EN T PAC K AGIN G 3,500 pi ece Tape and Reel Plasti c tubes (50 pi eces per tube)
1-8
Data Sheet - Rev 2.2 08/2001

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